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TRIO ADIONO

Institut Teknologi Bandung S3 - Teknik Elektro dan Informatika SINTA ID : 6033680
10.594
SINTA Score Overall
1.291
SINTA Score 3Yr
10.594
Affil Score
1.291
Affil Score 3Yr
Latest number of publications
  Scopus Analysis  

Real-Time Heart Rate Monitoring System Based on rPPG and Validation with a Pulse Oximeter
no-Q as Conference Proceedin 2025 International Symposium on Intelligent Signal Processing and Communication Systems Ispacs 2025
Author Order : 3 of 3     Creator : Abushukor S.F.K.
2025 0 cited
Parallel and Pipeline Multicore OFDM Baseband Processor for Wideband UOWC Systems
Q1 as Journal IEEE Transactions on Circuits and Systems I Regular Papers
Author Order : 1 of 7     Creator : Adiono T.
2025 0 cited
Exoskeleton-Based Robotic Gait Training Therapy for Children with Cerebral Palsy
no-Q as Conference Proceedin 2025 International Symposium on Intelligent Signal Processing and Communication Systems Ispacs 2025
Author Order : 2 of 7     Creator : Rahayu E.
2025 0 cited
Low Complexity and Scalable Architecture of Dual-Mode Training and Inference Hardware Accelerator for Deep Q-Network (DQN) Based Edge Computing
Q1 as Journal IEEE Access
Author Order : 5 of 5     Creator : Sumarudin A.
2025 1 cited
Zigzag Dataflow Architecture for Convolutional Neural Network
Q3 as Conference Proceedin International System on Chip Conference
Author Order : 0 of 6     Creator : Endrawati D.N.
2025 0 cited
Drug Dosage of Immune System Using Reinforcement Learning
no-Q as Conference Proceedin 2025 International Symposium on Intelligent Signal Processing and Communication Systems Ispacs 2025
Author Order : 5 of 5     Creator : Pratiwi W.
2025 0 cited
Transfer Learning Mechanism for Fast Learning of DQN Algorithm in Dynamic Maze Environment
no-Q as Conference Proceedin 2025 International Symposium on Intelligent Signal Processing and Communication Systems Ispacs 2025
Author Order : 6 of 6     Creator : Sumarudin A.
2025 0 cited
Design and implementation of a real-time SDR-FPGA-based versatile radio frequency OFDM system
Q2 as Journal Integration
Author Order : 1 of 7     Creator : Adiono T.
2025 0 cited
FPGA-Based VAE for Unsupervised Intrusion Detection System in Network Flow Features
no-Q as Conference Proceedin International Soc Design Conference 2025 Isocc 2025 Proceedings of Technical Papers
Author Order : 0 of 7     Creator : Feryputri N.A.
2025 0 cited
Hardware-Software Stitching Algorithm in Lightweight Q-Learning System on Chip (SoC) for Shortest Path Optimization
Q1 as Journal IEEE Access
Author Order : 4 of 4     Creator : Salomo Y.
2025 3 cited
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Summary

Article Quartile
Research Output
  Scopus GScholar WOS
Article 352 448 122
Citation 1821 3250 370
Cited Document 270 326 73
H-Index 20 26 11
i10-Index 53 101 13
G-Index 1 1 6
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